Active Harmonic Filters for Integrated Radio Frequency Amplifiers

ABSTRACT

A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

CROSS-REFERENCE TO RELATED APPLICATIONS

The application relates to and claims the benefit under 35 U.S.C. §119(e) to U.S. Provisional Patent Application No. 62/264,484 filed Dec.8, 2015 and entitled “ACTIVE HARMONIC FILTERS FOR INTEGRATED RF POWERAMPLIFIERS,” the entire contents of which is wholly incorporated byreference herein.

STATEMENT RE: FEDERALLY SPONSORED RESEARCH/DEVELOPMENT

Not Applicable

BACKGROUND 1. Technical Field

The present disclosure relates generally to radio frequency (RF)circuits, and more particularly, active harmonic filters for integratedRF power amplifiers.

2. Related Art

Wireless communications systems find application in numerous contextsinvolving data transfer over long and short distances alike, and thereexists a wide range of modalities suited to meet the particular needs ofeach. Fundamentally, wireless communications involve a radio frequency(RF) carrier signal that is variously modulated to represent data, andthe modulation, transmission, receipt, and demodulation of the signalconform to a set of standards for coordination of the same. Manydifferent mobile communication technologies or air interfaces exist, andvarious generations of these technologies are deployed in phases.

A fundamental component of any wireless communications system is thetransceiver, that is, the combined transmitter and receiver circuitry.The transceiver encodes the data to a baseband signal and modules itwith an RF carrier signal. Upon receipt, the transceiver down-convertsthe RF signal, demodulates the baseband signal, and decodes the datarepresented by the baseband signal. An antenna connected to thetransmitter converts the electrical signals to electromagnetic waves,and an antenna connected to the receiver converts the electromagneticwaves back to electrical signals. A communications link is establishedwhen both the transmission and reception of a signal are in accordancewith mutual parameters.

Transceivers typically do not generate sufficient power or havesufficient sensitivity for reliable communications standing alone. Thus,additional conditioning of the RF signal at both the transmission endand the reception end is necessary. The circuitry between thetransceiver and the antenna that provide this functionality is referredto as the front end, which includes a power amplifier for increasedtransmission power, and/or a low noise amplifier for increased receptionsensitivity. The front end also includes a switch circuit thatselectively interconnects the power amplifier and the low noiseamplifier to the antenna.

In an actual implementation, the RF power amplifier exhibits some degreeof non-linearity in the amplification of the radio frequency carriersignal. This results in harmonics, which are integer multiples of thefundamental operating frequency, being generated. These emissionsoutside the designated operating frequency are undesirable, as they havethe potential to interfere with other wireless systems. Accordingly,there are various regulatory requirements that govern the acceptablespurious emission levels in end products to ensure that differentcommunications devices can co-exist and function properly within thesame vicinity. These restrictions are imposed on each of the constituentcomponents, including the transceiver and the front end

Conventional RF power amplifiers thus incorporate harmonic filters tominimize the level of undesirable emissions. One possible way to reduceharmonic emissions is by way of a low-pass filter that rejects allfrequencies above the fundamental frequency, while another possibilityis a notch filter that rejects only certain harmonics as defined by theparticular communications standard. In order for the filter to be ableto reject high levels of harmonic frequencies, components having lowloss such as capacitors and inductors are utilized. On-die harmonicssuppression filters are insufficient, as the achievable performance islimited to the components that can be fabricated thereon. Capacitorswith high capacitance values and inductors with high inductance valuesare challenging to fabricate on-die due to their larger footprints, andattendant increases in cost.

Thus, external filter circuits may be added to prevent strong harmonicsignals to reach the antenna, either at the module level, e.g., as aseparate circuit element that is packaged together with the RF switch,power amplifier, and low noise amplifier, or at the printed circuitboard level, e.g., as a separate component and package mounted to theprinted circuit board and interconnected with conductive traces betweenthe pin outs of the separate packages. External filters, however, areexpensive, require additional space, and introduce additionaltransmission path losses.

Accordingly, there is a need in the art for harmonic rejection filterswith sufficient rejection levels to meet and exceed stringent spuriousemissions limits. There is also a need in the art for harmonic rejectionfilters that may be implemented on-die without substantial increases indie footprint. It would also be desirable for such filters to consumeminimal power, with less loss, and higher harmonic suppression thanpassive traps.

BRIEF SUMMARY

One embodiment of the present disclosure is directed to an active filterthat is connectible to a transmission line from an output of anamplifier for reducing harmonics of a signal being amplified thereby.The active filter may include an operational amplifier with an invertinginput, a non-inverting input, and a single-ended output. Additionally,there may be a resistor network connected to the non-inverting input andto the single-ended output. There may also be a firstinductive-capacitive element that is connected to the inverting inputand to the single-ended output. The first inductive-capacitive elementmay define a first rejection frequency notch corresponding to aninductance and a capacitance of the first inductive-capacitive element.The active filter may also include a filter circuit interface nodedefined at a junction of the first inductive-capacitive element to whichthe transmission line is connectible. The filter circuit interface nodemay have a frequency-dependent negative capacitance corresponding to alow frequency gain of the operational amplifier, half power pointbandwidth of the operational amplifier, and output impedance as definedby the resistor network and the first inductive-capacitive elementconnected thereto.

According to another embodiment of the present disclosure, there is anactive filter that is also connectible to an amplifier for reducingharmonics of a signal being amplified thereby. The active filter mayhave a single port that is connectible to the amplifier. Additionally,there may be a first differential amplifier circuit defining a firstnegative capacitance at a first predetermined operating frequency range.The first differential amplifier circuit may include a first pair oftransistors and a second pair of transistors. Each transistor in thefirst pair may be connected to a respective one of the transistors inthe second pair to define a corresponding inverting differential circuitsegment and a non-inverting differential circuit segment. The invertingdifferential circuit segment and the non-inverting differential segmentmay be interconnected with one or more passive circuit elements atcorresponding circuit junctions. At least one of these circuit junctionsmay be connected to the single port. The active filter may also includea first tank circuit having a first port that is connectible to theamplifier and a second port that is connected to the single port. Thefirst tank circuit together with the first negative capacitance of thefirst differential amplifier may define a first harmonic trap forreflecting the harmonics of the signal to block upstream passagethereof.

Still another embodiment of the present disclosure is a radio frequencyfront end circuit. There may be an output signal transmission line, aswell as an amplifier circuit with an input connected to a radiofrequency signal source and an output connected to the output signaltransmission line. The front end circuit may include a harmonicsuppression circuit connected to the amplifier circuit. Furthermore, theharmonic suppression circuit may include an active circuit elementhaving a frequency-dependent impedance and may be tuned as a reflectivetrap with a negative capacitance for one or more rejection frequencyranges each corresponding to a multiple of a fundamental frequency of asignal generated by the radio frequency signal source.

The present disclosure also contemplates a radio frequencycommunications module with the aforementioned active filter, as well asa wireless communications device that incorporates such an activefilter. The present disclosure will be best understood by reference tothe following detailed description when read in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other features and advantages of the various embodimentsdisclosed herein will be better understood with respect to the followingdescription and drawings, in which like numbers refer to like partsthroughout, and in which:

FIG. 1 a block diagram of an exemplary wireless communications devicethat may incorporate an active harmonic filter in accordance with thepresent disclosure;

FIG. 2 is a block diagram of an exemplary radio frequency amplifiercircuit according to another embodiment of the disclosure;

FIG. 3 is a schematic diagram of the radio frequency amplifier circuitincluding a first embodiment of the active harmonic filter;

FIGS. 4A, 4B, 4C and 4D are graphs plotting the simulated performance ofthe radio frequency amplifier circuit including the first embodiment ofthe active harmonic filter shown in FIG. 3;

FIGS. 5A and 5B are graphs plotting the harmonics power components alongsimulated single tone power sweeps of the radio frequency amplifiercircuit including the first embodiment of the active harmonic filtershown in FIG. 3;

FIG. 6 is a schematic diagram of the radio frequency amplifier circuitincluding an alternative variant of the active harmonic filter;

FIG. 7 is a graph plotting the scattering parameters (S-parameters)based upon a simulated performance of the radio frequency amplifiercircuit including the second embodiment of the active harmonic filtershown in FIG. 6;

FIG. 8 is a schematic diagram of the radio frequency amplifier circuitincluding two additional tank circuits connected to the transmissionline;

FIGS. 9A, 9B, 9C, and 9D are graphs plotting the simulated performanceof the radio frequency amplifier circuit shown in FIG. 8;

FIG. 10 is a graph plotting insertion loss along a power sweep in theradio frequency amplifier circuit shown in FIG. 8;

FIGS. 11A and 11B are graphs plotting the second and third harmonicspower components along a simulated single tone power sweeps of the radiofrequency amplifier circuit shown in FIG. 8;

FIG. 12A and 12B are graphs plotting the harmonic components from theradio frequency amplifier circuit shown in FIG. 8, with FIG. 12A showingthe simulated harmonics output without the active harmonic filter, andFIG. 12B showing the simulated harmonics output with the active harmonicfilter;

FIG. 13 is a schematic diagram of the radio frequency amplifier circuitincluding a second embodiment of the active harmonic filter implementedwith a differential amplifier circuit;

FIGS. 14A, 14B, 14C and 14D are graphs plotting the simulatedperformance of the radio frequency amplifier circuit including thesecond embodiment of the active harmonic filter shown in FIG. 13;

FIGS. 15A and 15B are graphs plotting the harmonics power componentsalong simulated single tone power sweeps of the radio frequencyamplifier circuit including the second embodiment of the active harmonicfilter shown in FIG. 13;

FIG. 16 is a schematic diagram of the radio frequency amplifier circuitincluding two of the second embodiment of the active harmonic filterimplemented with the differential amplifier circuit;

FIGS. 17A, 17B, 17C and 17D are graphs plotting the simulatedperformance of the radio frequency amplifier circuit shown in FIG. 16;

FIG. 18 is a schematic diagram of the radio frequency amplifier circuitincluding a variation of the second embodiment of the active harmonicfilter implemented with the differential amplifier circuit;

FIGS. 19A, 19B, 19C and 19D are graphs plotting the simulatedperformance of the radio frequency amplifier circuit shown in FIG. 18;

FIG. 20 is a schematic diagram of the radio frequency amplifier circuitincluding yet another variation of the second embodiment of the activeharmonic filter with two cascaded differential amplifier circuits;

FIGS. 21A, 21B, 21C and 21D are graphs plotting the simulatedperformance of the radio frequency amplifier circuit shown in FIG. 20;

FIGS. 22A and 22B are graphs plotting the harmonics power componentsalong simulated single tone power sweeps of the radio frequencyamplifier circuit shown in FIG. 20;

FIG. 23 is a schematic diagram of a packaged amplifier module; and

FIG. 24 is a schematic diagram of a cross-section of the packagedamplifier module shown in FIG. 23.

DETAILED DESCRIPTION

The detailed description set forth below in connection with the appendeddrawings is intended as a description of the several presentlycontemplated embodiments of active harmonic filters and radio frequencyamplifiers utilizing the same, and are not intended to represent theonly form in which the disclosed filter circuits may be developed orutilized. The description sets forth the functions and features inconnection with the illustrated embodiments. It is to be understood,however, that the same or equivalent functions may be accomplished bydifferent embodiments that are also intended to be encompassed withinthe scope of the present disclosure. It is further understood that theuse of relational terms such as first and second and the like are usedsolely to distinguish one from another entity without necessarilyrequiring or implying any actual such relationship or order between suchentities.

FIG. 1 illustrates a simplified wireless communications device 10 inwhich various embodiments of the active filters in accordance with thepresent disclosure may be incorporated. In various embodiments, thewireless communications device 10 can be a cellular telephone. However,the low noise amplifier circuit may be utilized in any wireless devicewith signal reception capabilities. The wireless communications device10 illustrated in FIG. 1 is intended to be a simplified example of acellular telephone and to illustrate one of many possible applicationsin which the low noise amplifier circuit can be implemented. One havingordinary skill in the art will understand the operation of a cellulartelephone, and, as such, implementation details are omitted.

The wireless communications device 10 includes a baseband subsystem 12,a transceiver 14, and a front end module 16. Although omitted from FIG.1, the transceiver 14 includes modulation and upconversion circuitry forpreparing a baseband information signal for amplification andtransmission, and includes filtering and downconversion circuitry forreceiving and downconverting a radio frequency signal to a basebandinformation signal to recover data. The details of the operation of thetransceiver 14 are known to those skilled in the art.

The baseband subsystem 12 generally includes a processor 18, which canbe a general purpose or special purpose microprocessor, memory 20,application software 22, analog circuit elements 24, and digital circuitelements 26, connected over a system bus 28. The system bus 28 caninclude the physical and logical connections to couple theabove-described elements together and enable their interoperability.

An input/output (I/O) element 30 is connected to the baseband subsystem12 over a connection 32, a memory element 34 is coupled to the basebandsubsystem 12 over a connection 36 and a power source 38 is connected tothe baseband subsystem 12 over connection 40. The I/O element 30 caninclude, for example, a microphone, a keypad, a speaker, a pointingdevice, user interface control elements, and any other device or systemthat allows a user to provide input commands and receive outputs fromthe wireless communications device 10.

The memory 20 can be any type of volatile or non-volatile memory, and inan embodiment, can include flash memory. The memory element 34 can bepermanently installed in the wireless communications device 10, or canbe a removable memory element, such as a removable memory card.

The power source 38 can be, for example, a battery, or otherrechargeable power source, or can be an adaptor that converts AC powerto the correct voltage used by the wireless communications device 10. Inan embodiment, the power source can be a battery that provides a nominalvoltage output of approximately 3.6 volts (V). However, the outputvoltage range of the power source can range from approximately 3.0 to6.0 V.

The processor 18 can be any processor that executes the applicationsoftware 22 to control the operation and functionality of the wirelesscommunications device 10. The memory 20 can be volatile or non-volatilememory, and in an embodiment, can be non-volatile memory that stores theapplication software 22.

The analog circuit elements 24 and the digital circuit elements 26include the signal processing, signal conversion, and logic that convertan input signal provided by the I/O element 30 to an information signalthat is to be transmitted. Similarly, the analog circuit elements 24 andthe digital circuit elements 26 include the signal processing, signalconversion, and logic that convert a received signal provided by thetransceiver 14 to an information signal that contains recoveredinformation. The digital circuit elements 26 can include, for example, aDigital Signal Processor (DSP), a Field Programmable Gate Array (FPGA),or any other processing device. Because the baseband subsystem 12includes both analog and digital elements, it is sometimes referred toas a mixed signal circuit.

The front end module 16 is generally comprised of components belongingto a transmit signal chain, components belonging to a receive signalchain, and a switch 42. For purposes of simplification, the transmitsignal chain is generally represented by a power amplifier 44, while thereceive signal chain is generally represented by a low noise amplifier46. The switch 42 interconnects the power amplifier 44 and the low noiseamplifier 46 to an antenna 48. The front end module 16 depicted in FIG.1 is understood to be for a single wireless operating mode, and thosehaving ordinary skill in the art will appreciate that a conventionalwireless communications device 10 has multiple wireless operating modesconforming to different standards. Accordingly, there may be multiplefront end modules 16 particularly configured for each operating mode, orone front end module 16 with multiple constituent components for eachoperating mode. Along these lines, these different operating modes mayutilize more than one antenna at a time (diversity mode operation), sothe single antenna 48 is presented by way of example only and not oflimitation.

As mentioned earlier, non-linearity of the power amplifier 44 may resultin harmonic components of the fundamental signal being generated therebyand then transmitted by the antenna 48. The harmonic components mayresult in degraded performance from nearby receivers, and may result inthe wireless communications device 10 not meeting regulatory spuriousemission limits. In accordance with various embodiments of the presentdisclosure, an active harmonic filter 50 is introduced into output ofthe power amplifier 44. As will be described in further detail below,the active harmonic filter 50 is understood to be a single port devicethat is connected to a transmit signal transmission line 62 from theoutput of the power amplifier 44 to the switch 42, and ultimately to theantenna 48. In one contemplated embodiment, a first implementation ofthe active harmonic filter 50-1 may in the front end module 16.Alternatively, as in a second implementation of 50-2, the activeharmonic filter may be implemented as a separate component external tothe front end module 16.

Although the present disclosure is based upon an implementation in whichthe active harmonic filter 50 rejects or attenuates harmonics generatedby the power amplifier 44, hence being connected to the output of thesame, this is by way of example only and not of limitation. Otherembodiments are contemplated in which the active harmonic filter 50 isutilized in connection with harmonics of the receive signal from theantenna 48. Accordingly, the active harmonic filter 50-3 can beconnected to a receive signal transmission line 62. Although notspecifically illustrated, the active harmonic filter 50-3 that isconfigured for incoming receive signals can likewise be implemented as aseparate component external to the front end module 16.

With reference to the block diagram of FIG. 2, one embodiment of thepresent disclosure is a front end circuit 56 that includes the poweramplifier 44 and the active harmonic filter 50. The power amplifier 44has an input 58 a that is connected to a transmit signal source 60,which is understood to be the transceiver 14. Additionally, the poweramplifier 44 has an output 58 b, which is connected to the antenna 48over a transmission line 62. The radio frequency (RF) signal generatedby the transceiver 14 is amplified by the power amplifier 44 prior totransmission via the antenna 48. The power amplifier 44 may have anysuitable configuration, and the contemplated active harmonic filter 50is not understood to require that the power amplifier 44 have a specificconfiguration.

The transmission line 62 may be defined as multiple parts or segments.For instance, there may be a first segment 62 a of the transmission linethat is within the physical bounds of the front end circuit 56, and thusbe implemented as conductive traces on the semiconductor die or as bondwires that electrically connect the corresponding pads on thesemiconductor die to contacts. Additionally, there may be a secondsegment 62 b that is exterior to the front end circuit 56 and thuscorresponds to a trace on a printed circuit board, a wire, or otherconductive element that separates the front end circuit 56 from theantenna 48. In this regard, the front end circuit 56 is understood tohave an antenna port 63 to which the antenna 48 is connected. Theaforementioned switch 42, however, has been omitted from the blockdiagram of FIG. 2 for the sake of simplicity, though it is to beunderstood that the typical embodiment of the front end circuit 56 wouldinclude the switch 42 that selectively interconnects the antenna 48 toeither the power amplifier 44 or the low noise amplifier 46.

The active harmonic filter 50 is understood to be a single port device,with a first port 64 thereof being connected to the transmission line62. In the illustrated embodiment, the active harmonic filter 50 isconnected to a junction 65 of the transmission line 62, which is withinthe physical bounds of the front end circuit 56 and is therefore part ofthe first segment 62 a. As will be described in further detail below,the active harmonic filter 50 serves as a reflective trap for signalfrequencies that are significantly higher than the fundamental frequencyof the transmit signal, e.g., harmonics of the transmit signal. Thus,harmonics are suppressed, so the active harmonic filter 50 may also bereferred to as a harmonic suppression circuit in some embodiments.Additionally, it is expressly contemplated that there is minimal loss ofthe transmit signal as output by the power amplifier 44.

The active harmonic filter 50 includes an active circuit element thathas a frequency-dependent impedance. A first embodiment of the activeharmonic filter 50 utilizes an operational amplifier, while a secondembodiment utilizes a differential amplifier. Both types of circuits areunderstood to generate a frequency-dependent impedance and are tuned forreflecting the undesirable harmonics. This is understood to block theupstream path of such harmonics to the antenna 48. Each active harmonicfilter 50 is tuned for a specific harmonic frequency, and to the extentsuppression of multiple harmonic frequencies is involved, multipleactive harmonic filters 50 may be connected along the transmission line62.

Referring to the schematic diagram of FIG. 3, additional details of afirst embodiment of the active harmonic filter 50 a will now bedescribed. Again, the power amplifier 44 is connected to the transmitsignal source 60, with the RF signal being fed to an amplifier element67. The power amplifier 44 includes an output matching network 68 thatimpedance matches the amplifier element 67 to the 50Ω antenna 48 and thetransmission line 62. The major components of the active harmonic filter50 and the power amplifier 44 may be part of a power amplifier circuit66 as delineated in FIG. 3, or be part of the front end circuit 56, orany other component. The aggregation of the active harmonic filter 50and the power amplifier 44 as the power amplifier circuit 66 is by wayof example only and not of limitation, and any suitable grouping or setstructure/interrelationships of the components, e.g., one componentbeing part of another, more broadly defined component, may besubstituted without departing from the scope of the present disclosure.

The first embodiment of the active harmonic filter 50 a includes anoperational amplifier U1, which includes an inverting input 70 a, anon-inverting input 70 b, and single-ended output 72. The operationalamplifier U1 is configured as a negative capacitance circuit, with theinverting input 70 a being connected to a first inductive-capacitiveelement 74, which in turn, is connected to the single-ended output 72.The first inductive-capacitive element 74 includes a capacitor C1 thatis connected in series with an inductor L1.

Connected to the non-inverting input 70 b is a resistor network 76 witha resistor R2 and a resistor R1. The non-inverting input 70 b isconnected to a junction 77 between the resistor R1 and the resistor R2.The resistor network 76, and specifically the resistor R1 thereof, isconnected to the single-ended output 72. A capacitor C2 is connected tothe resistor network 76, specifically the resistor R2 thereof at ajunction 78. The capacitor C2 is also connected to the inverting input70 a and the first inductive-capacitive element 74. The junction 78 istied to ground over an inductor L2, which is understood to be a bondwire and thus having minimal inductance. According to one exemplaryembodiment, the inductance value of inductor L2 is 0.5 nH. Thecombination of the capacitor C2 and the inductor L2 may define a secondinductive-capacitive element 80.

The negative capacitance as defined by the operational amplifier U1, isunderstood to be frequency-dependent. The absolute value of the negativecapacitance thus defined is a function of the low frequency gain of theoperational amplifier, as well as its half power point (−3 dB)bandwidth, and the output impedance, along with the tuning of thecapacitor C1, and the resistors R1 and R2.

The active harmonic filter 50 a has a rejection frequency range thatcorresponds to the set values of the first inductive-capacitive element74, as well as those of the second inductive-capacitive element 80. Thatis, the values of the inductor L1 and the capacitor C1 defines a firstnotch frequency, while the inductor L2 and the capacitor C2 defines asecond notch frequency. Both of these notch or rejection frequencies aretuned for overlapping each other, so a high level of rejection of asingle rejection frequency may be possible. The impedance of the activeharmonic filter 50 a is understood to be high, e.g., greater than 1 kΩ,so losses at the fundamental frequency or the base RF signal iscontemplated to the minimal. Along these lines, the negative capacitancecircuit is understood to convert only the reactive part of theimpedance, so no additional noise is introduced to the transmission line62.

The inverting input 70 a, that is, the junction of the firstinductive-capacitive element 74 and the second inductive-capacitiveelement 80, is understood to define a filter circuit interface node 82,as this is tied to the first port 64 of the active harmonic filter 50 a.Interconnecting the first port 64 to the filter circuit interface node82 is a direct current decoupling element 84 including a capacitor C3 inseries with an inductor L3. These components are understood to servedirect current (DC) decoupling purposes. Additionally, the inductanceand capacitance may be adjusted to fine-tune the response of the activeharmonic filter 50 a. In accordance with one embodiment, the capacitorL3 has an exemplary value of 1 pF, while the inductor L3 has anexemplary value of 1 nH.

The graphs of FIGS. 4A-4B plot the simulated performance of theforegoing power amplifier circuit 66 incorporating the first embodimentof the active harmonic filter 50 a that has been configured foroperating in the 2.4 GHz to 2.45 GHz Industrial-Scientific-Medical (ISM)band. In particular, FIG. 4A shows the transmission insertion loss (S21)being minimal in the operating frequency range as indicated in plotpoints M14 and M15 at 2.4 GHz and 2.5 GHz, respectively. At the secondharmonic of 5 GHz, however, there is approximately a −16 dB rejection,as indicated in plot points M24 and M29, corresponding to the 4.8 GHzharmonic and the 5.2 GHz harmonic, respectively. The graph of FIG. 4Bshows the noise figure/degradation of the signal-to-noise ratio, whichat plot points M12 and M13 corresponding to the operating/fundamentalfrequency of 2.4 GHz to 2.5 GHz, is minimal. The graph of FIG. 4C plotsthe input return loss (S11), which at the operating frequency range of2.4 GHz to 2.5 GHz, is approximately −20 dB, indicating that the poweramplifier circuit 66 is well matched. Along these lines, the Smith chartof FIG. 4D also plotting the input return loss (S11) further illustratesthis.

FIGS. 5A and 5B plot the simulated power sweep of the power amplifiercircuit 66 incorporating the first embodiment of the active harmonicfilter 50 a with a single tone signal. The graph of FIG. 5A inparticular includes a first set of plots 86 for the second harmonic,with plot points M1, M2, and M3 corresponding to the output power fromthe power amplifier circuit 66 with a 2.4 GHz signal, 2.45 GHz signal,and a 2.5 GHz signal, respectively. Additionally, there is a second setof plots 88 for the third harmonic, with plot points M4, M5, and M6representative of the output power of the third harmonic over the sweepof the input power at the 2.45 GHz center fundamental frequency. Asshown, the second harmonic distortion is less than −50 dBc and the thirdharmonic distortion is less than −73 dBc up to an in-band output powerof 15 dBm. The graph of FIG. 5B plots the gain compression at differentoutput power levels of the fundamental operating frequency of 2.4 GHz.Plot point M9 corresponds to an output power level of 3.945 dBm, plotpoint M8 corresponds to an output power level of 30.951 dBm, and plotpoint M7 corresponds to an output power level of −20.063 dBm. Acrossthis range of output power levels, the gain compression remains lessthan 0.1 dB.

The schematic diagram of FIG. 6 depicts another embodiment of the poweramplifier circuit 66, which like the embodiment shown in FIG. 3,includes the power amplifier 44 that is connected to the transmit signalsource 60 at the input 58 a, and the output 58 b connected to thetransmission line 62 to the antenna 48. An alternative variant of theactive harmonic filter 50 a′ is utilized, however. In further detail,the same operational amplifier U1 with the inverting input 70 a, thenon-inverting input 70 b, and the single-ended output 72 is utilized.The first inductive-capacitive element 74 is connected to the invertinginput 70 a and the single-ended output 72. The resistor network 76 islikewise connected to the non-inverting input 70 b, and to the secondinductive-capacitive element 80.

The junction of the first inductive-capacitive element 74 and the secondinductive-capacitive element 80 corresponds to the filter circuitinterface node 82, which is tied to the first port 64 of the activeharmonic filter 50. Interconnecting the first port 64 to the filtercircuit interface node 82 is a first tank circuit 90, which is thecapacitor C3 connected in parallel to the inductor L3. It is understoodthat the notch frequencies are tunable foe either the second or thethird harmonic, or a combination of both the second harmonic and thethird harmonic.

The graph of FIG. 7 plots the simulated performance of the foregoingpower amplifier circuit 66 incorporating the second variant of the firstembodiment of the active harmonic filter 50 a′ configured for operatingin the 2.4 GHz to 2.45 GHz ISM band. A first plot 92 shows the reverseisolation (S12), with a plot point M2 corresponding to an isolation ofapproximately −58 dB at the second harmonic frequency of 4.8 GHz, and aplot point M8 corresponding to an isolation of approximately −66 dB atthe third harmonic frequency of 7.3 GHz. A second plot 94 is of theinput return loss (S11), which at the operating frequency range isapproximately −15 dB.

The schematic diagram of FIG. 8 depicts an embodiment of the poweramplifier circuit 66 that again includes the power amplifier that isconnected to the transmit signal source 60 at the input 58 a, and theoutput 58 b that is connected to the transmission line 62 to the antenna48. The aforementioned second variant of the first embodiment of theactive harmonic filter 50 a′, is utilized. As discussed above, there isthe operational amplifier UI with the inverting input 70 a, thenon-inverting input 70 b, and the single-ended output 72. The firstinductive-capacitive element 74 is connected to the inverting input 70 aand the single-ended output 72, and the resistor network 76 is connectedto the non-inverting input 70 b, and to the second inductive-capacitiveelement 80.

The junction of the first inductive-capacitive element 74 and the secondinductive-capacitive element 80 corresponds to the filter circuitinterface node 82, which is tied to the first port 64 of the activeharmonic filter 50. Interconnecting the first port 64 to the filtercircuit interface node 82 is the first tank circuit 90.

Additionally connected in line with the transmission line 62 from thefirst port 64 of the active harmonic filter 50 is a second tank circuit98, which includes an inductor L4 connected in parallel with thecapacitor C4. This embodiment also incorporates a third tank circuit 100with an inductor L5 connected in parallel with the capacitor C5. As willbe discussed further, the power amplifier circuit 66 is understood toexhibit a higher level of rejection of the second and third harmonicsover the other embodiments. For purposes of simulating the performanceof the power amplifier circuit 66, in the first tank circuit 90, thecapacitor C3 is assigned an exemplary value of 3.4 pF, while theinductor is assigned an exemplary value of 0.2 nH. Furthermore, in thesecond tank circuit 98, the capacitor C4 is assigned an exemplary valueof 2.4 pF and the inductor L4 is assigned an exemplary value of 0.2 nH.Finally, in the third tank circuit 100, the capacitor C5 is assigned anexemplary value of 4.9 pF and the inductor L5 is assigned an exemplaryvalue of 0.2 nH. It will be recognized by those having ordinary skill inthe art that these values are presented by way of example only, and notof limitation.

The graphs of FIG. 9A and 9B plot the simulated performance of the poweramplifier circuit 66 shown in FIG. 8, which is configured for operationin the 2.4 GHz to 2.45 GHz ISM band. FIG. 9A in particular shows thetransmission insertion loss (S21) being minimal in the operatingfrequency range as indicated in plot points M14 and M15 at 2.4 GHz and2.5 GHz, respectively. At the second harmonic of 5 GHz, however, thereis approximately a −30 dB rejection, as indicated in plot points M18 andM19, corresponding to the 4.8 GHz harmonic and the 5 GHz harmonic,respectively. At the third harmonic band of 7.2 GHz, there is anotherharmonic rejection notch of at least −40 dB, with a plot point M16corresponding to the 7.5 GHz harmonic frequency being rejected by−43.840 dB, and a plot point M17 corresponding to the 7.2 GHz harmonicfrequency.

The graph of FIG. 9B shows the noise figure/degradation of thesignal-to-noise ratio, which at plot points M12 and M13 corresponding tothe operating/fundamental frequency of 2.4 GHz to 2.5 GHz, is minimal.The graph of FIG. 4C plots the input return loss (S11), which at theoperating frequency range of 2.4 GHz to 2.5 GHz, is approximately −8 dB,with the plot point M23 for the 2.4 GHz frequency indicating −8.240 dBand the plot point M22 for the 2.5 GHz frequency indicating −7.982 dB.FIG. 4D plots the output return loss (S22), with a plot point M29 forthe 2.4 GHz operating frequency being −8.813 dB and a plot point M24 forthe 2.5 GHz operating frequency being −8.480 dB.

The graph of FIG. 10 plots the insertion loss of the power amplifiercircuit 66 over a power sweep with a fundamental frequency (2.4 GHz)signal. There are separate plots for 2.4 GHz, 2.45 GHz, and 2.5 GHzsignals. As shown in the graph, there is a slight loss expansion at midto high power levels.

FIGS. 11A and 11B plot the simulated power sweep of the power amplifiercircuit 66 incorporating the second variant of the first embodiment ofthe active harmonic filter 50 a′, the second tank circuit 98, and thethird tank circuit 100, with a single tone signal. The graph of FIG. 11Ain particular includes a set of plots for the second harmonic, with plotpoints M1, M2, and M3 corresponding to the output power from the poweramplifier circuit 66 with a 2.4 GHz signal, a 2.5 GHz signal, and a 2.45GHz signal, respectively. The graph of FIG. 11B plots the thirdharmonic, with plot points M4, M5, and M6 corresponding to the outputpower with a 2.5 GHz signal, a 2.45 GHz signal, and a 2.4 GHz signal. Asshown, the second harmonic and third harmonic distortions are less than−53 up to an in-band output power of 25 dBm.

The significant reduction in the second and third harmonics by theincorporation of the active harmonic filter 50 may be seen from acomparison of the plots of FIGS. 12A and 12B. Specifically, FIG. 12Aplots the second harmonic and third harmonic power across a power sweepfor a signal with its fundamental frequency of 2.45 GHz in the poweramplifier circuit 66 without the active harmonic filter 50. FIG. 12Bplots the second harmonic and third harmonic power across a power sweepwith the circuit including the active harmonic filter 50.

Referring now to the schematic diagram of FIG. 13, the power amplifiercircuit 66 illustrated therein utilizes a second embodiment of theactive harmonic filter 50 b with a differential amplifier that provideactive capacitances. With the passive components connected thereto,active resonant circuits are defined. The active resonant circuits areunderstood yield a significantly higher Q-factor, especially whencompared to passive resonant circuits.

Referring to the schematic diagram of FIG. 13, the power amplifiercircuit 66 includes the power amplifier 44 that is connected to thetransmit signal source 60 at the input 58 a, and the output 58 b that isconnected to the transmission line 62 to the antenna 48. A secondembodiment of the active harmonic filter 50 b is connected to thetransmission line 62 at a junction 102. The active harmonic filter 50 bis likewise a single port device with the first port 64, which isconnected to the junction 102.

In further detail, the active harmonic filter 50 b is a differentialamplifier circuit 104 that includes a first pair of transistors M1 andM2, and a second pair of transistors M3 and M4. As illustrated, thetransistor M1 is connected to the transistor M3, and the transistor M2is connected to the transistor M4. Thus, each transistor in the firstpair are connected to a respective one of the transistors in the secondpair. The interconnected transistors M1 and M3 define an invertingdifferential circuit segment 106, while the interconnected transistorsM2 and M4 define a non-inverting differential circuit segment 108.

Although the transistor M1, M2, M3, and M4 are depicted as field effecttransistors, this is by way of example only and not of limitation. Anysuitable type of transistor may be substituted without departing fromthe scope of the present disclosure. Furthermore, the transistors andthe related circuitry may be fabricated using silicon-based technologiessuch as bulk CMOS (complementary metal oxide semiconductor), SOI(silicon-on-insulator), and BiCMOS (integration of bipolar junction andcomplementary metal oxide semiconductor fabrication technologies). Othersemiconductor technologies such as GaAs (gallium arsenide) may also beutilized.

The inverting differential circuit segment 106 is connected to thenon-inverting differential circuit segment 108 with one or more passivecomponents, including a capacitor C1 and an inductor L1. Specifically, ajunction 110 of the transistor M1 and M3, which is understood to be apart of the inverting differential circuit segment 106, is connectedover the capacitor C1 to a junction 112 of the transistor M2 and M4,which is understood to be part of the non-inverting differential circuitsegment 108. A junction 114 connected to the transistor M1, and ajunction 116 connected to the transistor M2, are interconnected to eachother with the inductor L1, which may have an exemplary value of 330 pH.Also connected to the junction 116 is a capacitor C2 that is connectedin series with the inductor L2, which may be implemented as a bond wire,to ground. A voltage supply VDD is also connected to the junction 116.In this regard, the capacitor C2 is understood to DC-decouple to thevoltage supply VDD from ground. By way of example, the capacitor C2 mayhave a value of 3 pF.

The gate of the transistor M1 is connected to the junction 116, whilethe gate of the transistor M2 is connected to the junction 114. The biaspoint of the transistors M3 and M4 are set by a bias setting circuit 118that includes a current source Iref and a resistor R1. The bias settingcircuit 118 is connected to the gate of both the transistor M3 and M4.

The junction 114 is connected to the first tank circuit 90 with thecapacitor C3 and the L3, which in turn is connected to or otherwiseelectrically contiguous with the first port 64. The first tank circuit90, together with the negative capacitance of the differential amplifiercircuit 104 is understood to define a first harmonic trap for rejectingthe harmonics of the signal on the output 58 b of the power amplifier44. According to one embodiment, the inductor L3 has a value of 1 nH,and the capacitor C3 has a value of 4 pF. The absolute value of thenegative capacitance, along with its dependent relationship to theoperating frequency, is defined by the size of the transistors M1, M2,M3, and M4, along with the inductance value of the inductor L1, and thecapacitance value of the capacitor C1. The negative capacitance convertsthe reactive part of the impedance, so little noise is introduced to thetransmission line 62. As will be illustrated below, the active harmonicfilter 50 b defines one or more frequency “notches” that correspond toharmonic frequencies that are rejected thereby. The inductors L1 and L3,together with the capacitor C1, is understood to define one of the notchfrequencies. The inductors L3 and the capacitor C3 sets the pass-bandcharacteristics of the active harmonic filter 50 b. The impedance at theoperating/fundamental frequency may be greater than 1 kΩ to minimizeinband signal losses.

The graphs of FIGS. 14A-14B plot the simulated performance of theforegoing power amplifier circuit 66 incorporating the second embodimentof the active harmonic filter 50 b that has been configured foroperating in the 2.4 GHz to 2.45 GHz ISM band. FIG. 14A shows thetransmission insertion loss (S21) being minimal in the operatingfrequency range as indicated in plot points M1 and M1 at 2.4 GHz and 2.5GHz, respectively. At the second harmonic of 5 GHz, however, there is arejection “notch” of at least −31 dB. Specifically, the plot point M8corresponding to the 4.8 GHz harmonic frequency shows a rejection of−31.854 dB, while the plot point M9 corresponding to the 5 GHz harmonicfrequency shows a rejection of −34.417 dB.

The graph of FIG. 14B shows the noise figure/degradation of thesignal-to-noise ratio, which at plot points M5 and M6 corresponding tothe operating/fundamental frequency of 2.4 GHz to 2.5 GHz, is minimal(less than 0.4 dB).

The graph of FIG. 14C plots the input return loss (S11), which at theoperating frequency range of 2.4 GHz to 2.5 GHz, is less than −20 dB,indicating that the power amplifier circuit 66 is well matched. Alongthese lines, the Smith chart of FIG. 14D also plotting the input returnloss (S11) further illustrates this.

FIGS. 15A and 15B plot the simulated power sweep with a single tonesignal of the power amplifier circuit 66 incorporating the secondembodiment of the active harmonic filter 50 b. The graph of FIG. 15A inparticular includes a first set of plots 120 for the second harmonic,with plot points M14, M18, and M13 corresponding to the output powerfrom the power amplifier circuit 66 with a 2.4 GHz signal, 2.45 GHzsignal, and a 2.5 GHz signal, respectively. Additionally, there is asecond set of plots 122 for the third harmonic, with plot points M15,M17, and M16 representative of the output power of the third harmonicover the sweep of the input power at the 2.5 GHz center fundamentalfrequency. As shown, the harmonic distortion is less than −63 dBc up toan in-band output power of 32 dBm. The graph of FIG. 15B plots the gaincompression at different output power levels of the fundamentaloperating frequency of 2.4 GHz. Plot point M12 corresponds to an outputpower level of −19.386 dBm, plot point M20 corresponds to an outputpower level of 27.630 dBm, and plot point M19 corresponds to an outputpower level of 31.64 dBm. Across this range of output power levels, thegain compression remains less than 0.1 dB up to an in-band output powerof 32 dBm.

Referring to the schematic diagram of FIG. 16, the power amplifiercircuit 66 again includes the power amplifier 44 that is connected tothe transmit signal source 60 at the input 58 a, and the output 58 bthat is connected to the transmission line 62 to the antenna 48. Inaccordance with the illustrated embodiment, two separate active harmonicfilters 50 are connected to the transmission line, but each instancethereof is understood to be the second embodiment 50 b described above,e.g., the differential amplifier implementation. In this regard, thefirst instance of the active harmonic filter 50 b-1 includes a firstinstance of the first tank circuit 90-1, as well as a first instance ofthe differential amplifier circuit 104-1. Likewise, the second instanceof the active harmonic filter 50 b-2 includes a second instance of thefirst tank circuit 90-2, and a second instance of the differentialamplifier circuit 104-2. The first instance of the differentialamplifier circuit 104-1 and the second instance of the differentialamplifier circuit 104-2 are understood to be configured and operate thesame way as discussed above in relation to the differential amplifiercircuit 104. As such, a discussion on the configuration of such subpartsof the differential amplifier circuits 104-1 and 104-2 will be omittedfor the sake of brevity.

The graphs of FIGS. 17A-17B plot the simulated performance of theforegoing power amplifier circuit 66 as shown in FIG. 16 that has beenconfigured for operating in the 2.4 GHz to 2.45 GHz ISM band. FIG. 17Ashows the transmission insertion loss (S21) being minimal in theoperating frequency range as indicated in plot points M1 and M1 at 2.4GHz and 2.5 GHz, respectively. At the second harmonic of 5 GHz, however,there is a rejection “notch” of approximately −40 dB. Specifically, theplot point M8 corresponding to the 4.8 GHz harmonic frequency shows arejection of −38.506 dB, while the plot point M9 corresponding to the 5GHz harmonic frequency shows a rejection of −40.993 dB.

The graph of FIG. 17B shows the noise figure/degradation of thesignal-to-noise ratio, which at plot points M5 and M6 corresponding tothe operating/fundamental frequency of 2.4 GHz to 2.5 GHz, is minimal(approximately 0.6 dB).

The graph of FIG. 17C plots the input return loss (S11), which at theoperating frequency range of 2.4 GHz to 2.5 GHz, is between −16.854 and−18.483, indicating that the power amplifier circuit 66 is well matched.The Smith chart of FIG. 17D also plotting the input return loss (S11)further illustrates this. In comparison to the performance of the poweramplifier circuit 66 described above in conjunction with FIG. 13, theslope/drop-off at the relevant frequencies of the power amplifiercircuit 66 shown in FIG. 16 is steeper, albeit with a slight increase ininsertion loss.

The schematic diagram of FIG. 18 depicts another variation of the poweramplifier circuit 66 that includes the power amplifier 44 that isconnected to the transmit signal source 60 at the input 58 a, and theoutput 58 b that is connected to the transmission line 62 to the antenna48. In this implementation, there is a second variation of the activeharmonic filter 50 b′ that includes the first tank circuit 90 and thedifferential amplifier circuit 104. Additionally, the second tankcircuit 98 is connected to the first tank circuit 90, and in turn, thesecond tank circuit 98 is connected to the transmission line 62. Becausethe differential amplifier circuit 104 is understood to be configuredand operate the same way as discussed above, for the sake of brevity, arepeated discussion of the configuration thereof will be omitted. By wayof example, the inductor

The graphs of FIGS. 19A-19B plot the simulated performance of theforegoing power amplifier circuit 66 as shown in FIG. 18 that has beenconfigured for operating in the 2.4 GHz to 2.45 GHz ISM band. FIG. 19Ashows the transmission insertion loss (S21) being minimal in theoperating frequency range as indicated in plot points M1 and M1 at 2.4GHz and 2.5 GHz, respectively. At the second harmonic of 5 GHz, however,there is a rejection “notch” of approximately −42 dB. The plot point M8corresponds to a lower end of the range of harmonic frequencies that arerejected at 4.8 GHz, and at this point, the rejection is −27.156 dB. Theplot point M9 corresponds to an upper end at 5 GHz, and the rejection is−26.677. At the center between these high and low ends is 4.9 GHz asdesignated by the plot point M10. The rejection at this frequency is−42.487 dB.

The graph of FIG. 19B shows the noise figure/degradation of thesignal-to-noise ratio, which at plot points M5 and M6 corresponding tothe operating/fundamental frequency of 2.4 GHz to 2.5 GHz, is minimal atapproximately 0.2 dB.

The graph of FIG. 19C plots the input return loss (S11), which at theoperating frequency range of 2.4 GHz to 2.5 GHz, is between −28.853 and−30.715. The Smith chart of FIG. 17D also plotting the input return loss(S11) shows that the power amplifier circuit 66 is matched to theantenna 48. In comparison to the performance of the power amplifiercircuit 66 described above in conjunction with FIGS. 13 and 16,insertion loss is reduced, while other performance parameters are thesame.

Referring to the schematic diagram of FIG. 20, the power amplifiercircuit 66 again includes the power amplifier 44 that is connected tothe transmit signal source 60 at the input 58 a, and the output 58 bthat is connected to the transmission line 62 to the antenna 48. A thirdembodiment of the active harmonic filter 50 c is contemplated, whichincludes a first instance of the differential amplifier circuit 104-1and a second instance of the differential amplifier circuit 104-2. Thefirst instance of the differential amplifier circuit 104-1 is connectedto the second instance of the differential amplifier circuit 104-2,which in turn is connected to the first tank circuit 90. In furtherdetail, the junction 114-1 defined in the first instance of thedifferential amplifier circuit 104-1 is connected to the junction 116-2defined in the second instance of the differential amplifier circuit104-2. Additionally, both the first instance of the differentialamplifier circuit 104-1 and the second instance of the differentialamplifier circuit 104-2 share a common bias setting circuit 118, whichis connected to the gates of the transistors M3-1 and M4-1 of the firstinstance of the differential amplifier circuit 104-2, as well as thetransistors M3-2 and M4-2 of the second instance of the differentialamplifier circuit 104-2. Likewise, there is one voltage source VDD thatis connected to the junction 116-1 of the first instance of thedifferential amplifier circuit 104-1, and one DC-decoupling capacitor C2in series with the bond wire of L2.

The first instance of the differential amplifier circuit 104-1 and thesecond instance of the differential amplifier circuit 104-2 areunderstood to be configured and operate the same way as discussed abovein relation to the differential amplifier circuit 104. As such, adiscussion on the configuration of such subparts of the differentialamplifier circuits 104-1 and 104-2 will be omitted for the sake ofbrevity.

The graphs of FIGS. 21A-21B plot the simulated performance of theforegoing power amplifier circuit 66 as shown in FIG. 20 that has beenconfigured for operating in the 2.4 GHz to 2.45 GHz ISM band. FIG. 21Ashows the transmission insertion loss (S21) being minimal in theoperating frequency range as indicated in plot points M1 and M1 at 2.4GHz and 2.5 GHz, respectively. At the second harmonic of 5 GHz, there isa rejection “notch” of over −40 dB. Specifically, the plot point M8corresponding to the 4.8 GHz harmonic frequency shows a rejection of−27.156 dB, while the plot point M9 corresponding to the 5 GHz harmonicfrequency shows a rejection of −26.677 dB. Additionally, at 4.9 GHz, perplot point M10, there is a rejection of −42.487 dB. In comparison to theperformance of the power amplifier circuit 66 described above, thisvariation has a higher harmonics rejection characteristic.

Similar to the above, the graph of FIG. 21B shows the noisefigure/degradation of the signal-to-noise ratio, which at plot points M5and M6 corresponding to the operating/fundamental frequency of 2.4 GHzto 2.5 GHz, is minimal (approximately 0.2 dB).

The graph of FIG. 21C plots the input return loss (S11), which at theoperating frequency range of 2.4 GHz to 2.5 GHz, is between −28.853 and−30.815 indicating that the power amplifier circuit 66 is well matched.The Smith chart of FIG. 21D also plotting the input return loss (S11)further illustrates this.

FIGS. 22A and 22B plot the simulated power sweep with a single tonesignal of the power amplifier circuit 66 with the third embodiment ofthe active harmonic filter 50 c. The graph of FIG. 22A in particularincludes a plot 124 for the second harmonic, as well as a plot 126 forthe third harmonic. The graph of FIG. 22B plots the gain compression atdifferent output power levels of the fundamental operating frequency of2.4 GHz, 2.45 GHz, and 2.5 GHz. Plot point M12 corresponds to an outputpower level of −19.386 dBm at the 2.4 GHz operating frequency, plotpoint 19 corresponds to an output power level of 31.640 dBm at the 2.45GHz operating frequency, and plot point M20 corresponds to an outputpower level of −27.630 dBm at the 2.5 GHz operating frequency.

FIG. 23 is a schematic diagram of an embodiment of a packaged radiofrequency communications module 130, while FIG. 24 is a schematicdiagram of a cross-section of the packaged radio frequencycommunications module 130 taken along axis A-A of FIG. 23. The packagedradio frequency communications module 130 includes an integrated circuitor die 132, surface mount components 134, wire bonds 136, a packagesubstrate 138, and an encapsulation structure 140. The package substrate138 includes pads 142 formed from conductors disposed therein.Additionally, the die 132 includes pads 144, and the wire bonds 136 areused to electrically connect the pads 144 of the die 132 to the pads 142of the package substrate 138.

The die 132 includes the power amplifier 44 and the active harmonicfilter 50 of the present disclosure formed therein. These components onthe die 202 are understood to be as described above. Again, it isexpressly contemplated that the active harmonic filter 50 is fabricatedon the same die as the power amplifier 44 so as to avoid the need for anexternally connected filter circuit. However, this is exemplary only,and other embodiments also contemplate connecting an suitably configuredactive harmonic filter 50 according to the present disclosure, butimplemented as a separate circuit external to the die 132.

The die 132 is mounted to the package substrate 138 as shown, though itmay be configured to receive a plurality of additional components suchas the surface mount components 134. These components include additionalintegrated circuits as well as passive components such as capacitors,inductors, and resistors.

As shown in FIG. 23, the packaged radio frequency communications module130 is shown to include a plurality of contact pads 146 disposed on theside of the packaged radio frequency communications module 130 oppositethe side used to mount the die 132. Configuring the packaged radiofrequency communications module 130 in this manner can aid in connectingthe same to a circuit board of the wireless communications device 10.The example contact pads 146 can be configured to provide radiofrequency signals, bias signals, power low voltage(s) and or power highvoltage(s) to the die 132 and/or the surface mount components 134. Theelectrical connections between the contact pads 146 and the die 132 canbe facilitated by connections 148 through the package substrate 138. Theconnections 148 can represent electrical paths formed through thepackage substrate 138, such as connections associated with vias andconductors of a multilayer laminated package substrate.

In some embodiments, the packaged radio frequency communications module130 can also include or more packaging structures to, for example,provide protection and/or to facilitate handling of the packaged radiofrequency communications module 130. Such a packaging structure caninclude overmold or encapsulation structure 140 formed over the packagesubstrate 138 and the components and die(s) disposed thereon.

It will be understood that although the packaged radio frequencycommunications module 130 is described in the context of electricalconnections based on wire bonds, one or more features of the presentdisclosure can also be implemented in other packaging configurations,including, for example, flip-chip configurations.

By utilizing the various embodiments of the active harmonic filter 50 inthe power amplifier circuits 66, elimination of external filters ispossible, thereby reducing cost, printed circuit board footprint, andlosses associated with the interconnections needed with an externalcomponent. Furthermore, as illustrated above, the active harmonicfilters 50 are understood to consume little power, as the supply (VDD)can be 1.8 V and as low as 1 V, and quiescent current through thecircuit may be as low as 200 μA to 700 μA. Moreover, the active harmonicfilters 50 have large power handling capability but with low addeddistortion, and thus may be suited for highly linear RF power amplifiercircuits such as those utilized in the latest wireless communicationsmodalities such as IEEE 802.11ac. In comparison to passive trapcircuits, the presently disclosed active harmonic filters 50 exhibitless loss, and higher suppression of harmonics.

The particulars shown herein are by way of example and for purposes ofillustrative discussion of the embodiments of the active harmoniccircuits and RF amplifiers incorporating the same, and are presented inthe cause of providing what is believed to be the most useful andreadily understood description of the principles and conceptual aspects.No attempt is made to show details with more particularity than isnecessary, the description taken with the drawings making apparent tothose skilled in the art how the several forms of the present disclosuremay be embodied in practice.

1. An active filter connectible to a transmission line from an output ofan amplifier for reducing harmonics of a signal being amplified thereby,the active filter comprising: an operational amplifier with an invertinginput, a non-inverting input, and a single-ended output; a resistornetwork connected to the non-inverting input and to the single-endedoutput; a first inductive-capacitive element connected to the invertinginput and to the single-ended output and defining a first rejectionfrequency notch corresponding to an inductance and a capacitance of thefirst inductive-capacitive element; and a filter circuit interface nodedefined at a junction of the first inductive-capacitive element to whichthe transmission line is connectible and having a frequency-dependentnegative capacitance corresponding to a low frequency gain of theoperational amplifier, half power point bandwidth of the operationalamplifier, and output impedance as defined by the resistor network andthe first inductive-capacitive element connected thereto.
 2. The activefilter of claim 1 further comprising a second inductive-capacitiveelement connected to the inverting input and defining a second rejectionfrequency notch corresponding to an inductance and capacitance of thesecond inductive-capacitive element.
 3. The active filter of claim 2wherein the first inductive-capacitive element and the secondinductive-capacitive element are tuned for the first rejection frequencynotch and the second rejection frequency to overlap.
 4. The activefilter of claim 1 further comprising a direct current decoupling elementconnecting the filter circuit interface node to the transmission line,and including a first capacitor and a second capacitor.
 5. The activefilter of claim 4 wherein the first capacitor and the second capacitorare connected in series.
 6. The active filter of claim 4 wherein thefirst capacitor and the second capacitor are connected in parallel.7-37. (canceled)
 38. A radio frequency front end circuit comprising: anoutput signal transmission line; an amplifier circuit with an inputconnected to a radio frequency signal source and an output connected tothe output signal transmission line; an operational amplifier with aninverting input, a non-inverting input, and a single-ended output; aresistor network connected to the non-inverting input and to thesingle-ended output; a first inductive-capacitive element connected tothe inverting input and to the single-ended output and defining a firstrejection frequency notch corresponding to an inductance and acapacitance of the first inductive-capacitive element; and a filtercircuit interface node defined at a junction of the firstinductive-capacitive element to which the output signal transmissionline is connectible and having a frequency-dependent negativecapacitance corresponding to a low frequency gain of the operationalamplifier, half power point bandwidth of the operational amplifier, andoutput impedance as defined by the resistor network and the firstinductive-capacitive element connected thereto.
 39. The radio frequencyfront end circuit of claim 38 further comprising a secondinductive-capacitive element connected to the inverting input anddefining a second rejection frequency notch corresponding to aninductance and capacitance of the second inductive-capacitive element.40. The radio frequency front end circuit of claim 39 wherein the firstinductive-capacitive element and the second inductive-capacitive elementare tuned for the first rejection frequency notch and the secondrejection frequency to overlap.
 41. The radio frequency front endcircuit of claim 38 further comprising a direct current decouplingelement connecting the filter circuit interface node to the outputsignal transmission line, and including a first capacitor and a secondcapacitor.
 42. The radio frequency front end circuit of claim 41 whereinthe first capacitor and the second capacitor are connected in series.43. The radio frequency front end circuit of claim 41 wherein the firstcapacitor and the second capacitor are connected in parallel.
 44. Theradio frequency front end circuit of claim 38 further comprising a firsttank circuit having a first port connectible to the amplifier circuitand a second port connected to the filter circuit interface node, thefirst tank circuit at least partly defining a first harmonic trap. 45.The radio frequency front end circuit of claim 44 further comprising asecond tank circuit having a first port connectible to the amplifiercircuit and a second port connected to the first port of the first tankcircuit, the first tank circuit and the second tank circuit at leastpartly defining the first harmonic trap.
 46. A radio frequencycommunications module comprising: a packaging substrate on which aplurality of components are mounted; an output signal transmission linedisposed on the packaging substrate; an amplifier circuit implemented onthe packaging substrate, the amplifier circuit including an inputconnected to a radio frequency signal source and an output connected tothe output signal transmission line; an operational amplifierimplemented on the packaging substrate, the operational amplifierincluding an inverting input, a non-inverting input, and a single-endedoutput; a resistor network implemented on the packaging substrate andconnected to the non-inverting input and to the single-ended output; afirst inductive-capacitive element implemented on the packagingsubstrate and connected to the inverting input and to the single-endedoutput and defining a first rejection frequency notch corresponding toan inductance and a capacitance of the first inductive-capacitiveelement; and a filter circuit interface node defined at a junction ofthe first inductive-capacitive element on the packaging substrate towhich the output signal transmission line is connectible and having afrequency-dependent negative capacitance corresponding to a lowfrequency gain of the operational amplifier, half power point bandwidthof the operational amplifier, and output impedance as defined by theresistor network and the first inductive-capacitive element connectedthereto.
 47. The radio frequency communications module of claim 46further comprising a second inductive-capacitive element implemented onthe packaging substrate and connected to the inverting input anddefining a second rejection frequency notch corresponding to aninductance and capacitance of the second inductive-capacitive element.48. The radio frequency communications module of claim 47 wherein thefirst inductive-capacitive element and the second inductive-capacitiveelement are tuned for the first rejection frequency notch and the secondrejection frequency to overlap.
 49. The radio frequency communicationsmodule of claim 46 further comprising a direct current decouplingelement implemented on the packaging substrate and connecting the filtercircuit interface node to the output signal transmission line, thedirect current coupling element including a first capacitor and a secondcapacitor.
 50. The radio frequency communications module of claim 49wherein the first capacitor and the second capacitor are connected inseries.
 51. The radio frequency communications module of claim 49wherein the first capacitor and the second capacitor are connected inparallel.
 52. The radio frequency communications module of claim 46further comprising a first tank circuit implemented on the packagingsubstrate and having a first port connectible to the amplifier circuitand a second port connected to the filter circuit interface node, thefirst tank circuit at least partly defining a first harmonic trap. 53.The radio frequency communications module of claim 46 further comprisinga second tank circuit implemented on the packaging substrate and havinga first port connectible to the amplifier circuit and a second portconnected to the first port of the first tank circuit, the first tankcircuit and the second tank circuit at least partly defining the firstharmonic trap.